Gaurav Sapkota

Cyber Security Analyst

Electronics Engineer

Systems Engineer

Web Apps Designer

Photographer

Blogger

Gaurav Sapkota

Cyber Security Analyst

Electronics Engineer

Systems Engineer

Web Apps Designer

Photographer

Blogger

Analysis and Verification of MOS Current Mode Logic for buffer.

Thesis

Jan 2017 – May 2017

Organization: Sharda University, Greater Noida, UP, India.

  • Design a Metal Oxide Semiconductor (MOS) current mode logic which can be used as a buffer.
  • Simulate the designed circuit using Cadence Tools, PSPICE or LTSPICE.
  • Monitor the performance including heat generated and electricity consumption & prepare detailed report.

Successfully designed the MOS circuit using PSPICE simulator. Low electricity consumption and comparatively high heat generation.

Cadence Tools, PSPICE, LTSPICE, Verilog, VHDL, Strategic Planning, Report writing, MS Office.